1. Field of the Invention
The present invention relates to a development bias voltage generating circuit in an electrophotographic image forming apparatus.
2. Description of the Related Art
Generally, in a development device included in an electrophotographic or electrostatic-recording type image forming apparatus, a one-component developer chiefly composed of magnetic toner or a two-component developer chiefly composed of non-magnetic toner and a magnetic carrier is used. Specifically, in a color image forming apparatus that forms a full-color image by electrophotographic process, almost every development device uses a two-component developer from a viewpoint of color of images.
In a development process by the development device in the image forming apparatus, a high voltage having an AC voltage superposed on a DC voltage is applied to a developer bearing member to develop an electrostatic latent image on an image bearing member with a developer on the developer bearing member.
However, it is confirmed that when a high voltage is applied to a development gap (a gap between a photosensitive drum and a development sleeve), a ring or a spot pattern as illustrated in FIGS. 8A and 8B (hereinafter, referred to as a ring mark) is generated on a recording paper. FIG. 8A illustrates a ring mark formed in a background area of an image and FIG. 8B illustrates a ring mark formed in an image area. Such ring marks seriously degrade an image quality.
A generation mechanism of ring marks is as follows. As a process of image forming on recording paper is repeated in the image forming apparatus, metallic particles from the development sleeve surface scraped by the carrier and from the metal screws enter into the development device due to vibrations during the operation of image forming apparatus. When the metallic foreign particles enter the development device, the development gap is narrowed, so that an electric discharge occurs between the metallic particles and the photosensitive drum surface and the ring marks is generated.
Considering such a principle of generation of the ring marks, it has been confirmed that it is effective to reduce a positive voltage Vp+ of a development AC voltage illustrated in FIG. 9 for suppressing the ring marks that is generated in the background area. FIG. 9 illustrates surface potentials of the photosensitive drum and movement of the developer. Vdark indicates the surface potential of an area not exposed (not developed) by an exposure unit on the uniformly charged photosensitive drum, and Vlight indicates the potential of a latent image formed by the exposure unit. Vdc indicates a DC potential applied to the development sleeve which serves as the developer bearing member, by a development DC voltage generator, and the Vp+ and Vp− indicate amplitude potentials of an AC voltage applied to the development sleeve by a development AC voltage generator.
A potential difference Vcontrast between the potentials Vdc and Vlight influences a development density, namely, a density of a visible image, and a potential difference Vback between the potentials Vdark and Vdc prevents an unexposed area from being developed (fogging prevention). When the potential Vp+ is reduced, the potential difference between the potentials Vdark and Vp+ is reduced, and as a result, the ring marks are decreased.
If a high-density area and a low-density area are adjacent to each other, the developer which should normally adhere to a latent image in the low-density area sometimes adheres to the latent image in the high-density area, or the area which should be developed is not developed, and a phenomenon in which a part of the image is missing (hereinafter, referred to as a pinhole) occurs. As to this phenomenon, it is known that if an absolute value of the potential Vp− increases, the potential difference from the potential Vlight increases, and therefore the latent image in the low-density area is also developed with high accuracy.
Since an AC voltage is applied to the development sleeve, an electric field Vp− in a direction that transfers the developer from the development sleeve to the photosensitive drum and a electric field Vp+ in a direction that returns the developer from the photosensitive drum to the development sleeve are applied alternately, thus a force is exerted to swing the developer.
Therefore, development unevenness can be reduced without depending on the potential difference between the potentials Vdc and Vlight, and developing ability is stabilized. However, a pinhole may be generated in the developer unless some measures are taken. It is known that the developing ability is improved by providing an idle period (a blank period), namely a certain period in which the AC voltage is not applied to the development sleeve, between pulse trains acting as a development bias voltage.
Alternatively, a developing bias voltage with a pulse waveform (FIG. 10) is applied in which a time length to output a positive voltage Vp+ (a positive pulse width) is different from a time length to output a negative voltage Vp− (a negative pulse width). In addition, an absolute value of the voltage Vp+ is smaller than that of the voltage Vp−, the blank periods are provided, and a duty ratio is not 50%. When the bias voltage with such a pulse waveform is applied, the developing ability can be also improved. The waveform as illustrated in FIG. 10 is referred to as a lopsided duty ratio-blank pulse waveform. As a method for outputting the lopsided duty ratio blank pulse waveform, conventionally, a high-voltage transistor is utilized as illustrated in FIG. 11 (Refer to Japanese Patent Application Laid-Open No. 06-138755).
In this method, to generate two kinds of high-voltage DC voltage, two boosting and smoothing circuits 1001 and 1002 are required. Further, in a high-voltage switch circuit, an isolation transformer and a high-voltage transistor need to be provided for both a positive and a negative high voltages for switching operation. The high voltage parts having different potentials need to be separated from each other by a given distance or more to prevent leakage of high voltage. Consequently, a problem arises that a number of parts increases, which leads to increase of sizes and costs of circuit boards. Since the high-voltage transistor is expensive, the two high-voltage transistors are in practice arranged in series to secure a required high voltage state.
Conventionally, as illustrated in FIG. 12, a blank pulse waveform is generated which applies a square waveform with a duty ratio of 50% at regular periodic intervals (hereinafter, referred to as a 50% duty ratio blank pulse waveform). As illustrated in FIG. 13, there is another conventional method which is used to shape the AC voltage waveform of a continuous AC waveform with no blank period. This AC voltage waveform has a duty ratio other than 50% and is shaped on a primary side of a high voltage transformer. In this method, high-voltage AC waveform is generated without using a high-voltage transistor.
As a circuit configured to output the 50% duty ratio blank pulse waveform, an H-bridge circuit that uses a primary winding of the transformer as its load as illustrated in FIG. 14 is known. In a circuit illustrated in FIG. 14, a control unit 1000 outputs an ON signal to switching elements Q1 and Q4 at predetermined timing to apply a voltage Vp+ to a development sleeve 4-1. Then, the control unit 1000 outputs an ON signal to switching elements Q3 and Q2 to apply a voltage Vp− to the development sleeve 4-1. Further, the control unit 1000 outputs an ON signal to the switching elements Q1 and Q3 to generate a voltage of 0 V.
However, in the circuit in FIG. 14, sometimes, command values other than the duty ratio of 50% are necessary. For example, when a pulse waveform in which the ratio between Vp+ output time and Vp− output time is 70:30 (hereinafter, referred to as 70% duty ratio) is output, a magnetic flux ΔB is generated in a transformer T1 when one cycle of the pulse waveform has been output. Since there is no time period for resetting the magnetic flux ΔB, the magnetic flux is incremented by ΔB each time one cycle of the pulse waveform is output, and it will reach magnetic saturation before long. Therefore, it is difficult to use waveforms with a duty ratio other than 50%.
As a circuit to output a continuous AC waveform with a duty ratio other than 50%, in a conventional circuit, a capacitor C1 is inserted in series with the primary winding of the load transformer T1 in the H-bridge circuit as illustrated in FIG. 15. When a 70% duty ratio pulse waveform is output in this circuit, a potential difference across the capacitor C1 is four-tenth of a power supply voltage (Vin) ( 4/10 Vin V) in a steady state. Therefore, a voltage across the primary winding of the transformer T1 is 3/10 Vin V when the switching elements Q1, Q4 are ON and − 7/10 Vin V when the switching elements Q3, Q2 are ON. At this time, a voltage amplitude of 30:70 is generated while an ON time ratio of an applied pulse is 70:30. Thus, the magnetic flux is reset at the end of each cycle, and the continuous AC waveform with 50% duty ratio can be output permanently.
However, if a pulse with a blank period is applied, the potential difference across the capacitor C1 is smoothened, including the blank period in which a voltage 0V is applied. Thus, the potential difference inevitably becomes lower than 4/10 Vin V. As a result, it is impossible to obtain desirable voltages Vp− and Vp+, and only waveforms that depend on the length of the blank periods can be obtained.